Publications Repository - Helmholtz-Zentrum Dresden-Rossendorf

The traditional scaling of microelectronic devices was over in 2003 (130 nm node). New “performance boosters” are being used since then: (i) strained silicon (Si) since 2004 (90 nm node), (ii) high-k gate dielectrics + metal gates (HKMG) instead of SiO2 + poly-Si gates since 2008 (45 nm node) and (iii) non-planar 3D (tri-gate) transistor architecture since 2012 (22 nm node). Further improvements are expected by the implementation of (i) new device architectures, (ii) high-mobility channel materials such as silicon-germanium (SiGe), Ge, III-Vs, carbon nanotubes (CNTs), graphene and/or other 2D materials, etc., (iii) new (non-digital) functionalities (e.g. sensing), usually referred to as “More than Moore”, and (iv) new computational principals such as spintronics, quantum computing, etc.

In this talk I will present three novel nanoelectronics devices that have been proposed and demonstrated for the first time in the last 5-6 years: (i) junctionless nanowire transistors (JNTs) [1], (ii) 3D vertically stacked nanowire field effect transistors (VSNFETs) [2] and (iii) reconfigurable field effect transistors (RFETs) [3]. These devices embody to some extent the first three of the above-mentioned future “performance boosters”: (i) they have advanced transistor architecture, (ii) JNTs have been fabricated not only in Si but also in Ge as a high-mobility channel material and (iii) JNTs and VSNFETs have been implemented as chemical and biosensors demonstrating excellent sensing performance.
I will briefly discuss the specifics in the functioning of those devices, outlining their advantages and disadvantages. I will then consider the technologies for their fabrication and the challenges that they are facing. Finally, I will present examples of the devices fabricated for some particular applications, showing results of their structural and electrical characterisation. In the case of JNTs and VSNFETs I will focus mostly on their application as chemo/biosensors [4-8]. Additionally, I will also show the first Ge-based JNTs [9]. In the case of RFETs I will present the recent results of top-down fabrication and characterisation of such devices on silicon-on-insulator (SOI) wafers.

[1] J.P. Colinge, C.-W. Lee, A. Afzalian, N.D. Akhavan, R. Yan, I. Ferain, P. Razavi, B. O’Neill, A. Blake, M. White, A.-M. Kelleher, B. McCarthy and R. Murphy, Nanowire transistors without junctions. Nat. Nanotechnol. 5 (2010) 225.
[2] E. Buitrago, M. Fernández-Bolaños, A.M. Ionescu, Vertically stacked Si nano-structures for biosensing applications, Microelectron. Eng. 97 (2012) 345–348.
[3] A. Heinzig, T. Mikolajick, J. Trommer, D. Grimm and W. M. Weber, Nano Lett. 13 (2013) 4176-4181.
[4] Y. M. Georgiev, N. Petkov, B. McCarthy, R. Yu, V. Djara, D. O'Connell, O. Lotty, A. M. Nightingale, N. Thamsumet, J. C. deMello, A. Blake, S. Das, J. D. Holmes. Fully CMOS-compatible top-down fabrication of sub-50 nm silicon nanowire sensing devices. Microelectron. Eng. 118 (2014) pp. 47-53.
[5] Y. M. Georgiev, R. Yu, N. Petkov, O. Lotty, A. M. Nightingale, J. C. deMello, R. Duffy, J. D. Holmes. Silicon and Germanium Junctionless Nanowire Transistors for Sensing and Digital Electronics Applications. In "Functional Nanomaterials and Devices for Electronics, Sensors and Energy Harvesting.", A. Nazarov, F. Balestra, V. Kilchytska, D. Flandre eds. Springer International Publishing AG, Cham, Switzerland, 2014, pp. 367-388.
[6] E. Buitrago, G. Fagas, M. Fernández-Bolanos Badia, Y.M. Georgiev, M. Berthomé, A.M. Ionescu. Junctionless silicon nanowire transistors for the tunable operation of a highly sensitive, low power sensor. Sens. Actuators B 183 (2013) 1– 10.
[7] E. Buitrago, M. Fernández-Bolaños, Y. M. Georgiev, R. Yu, O. Lotty, J. D. Holmes, A. M. Nightingale, H. M. Guerin, A. M. Ionescu. Electrical Characterization of High Performance, Liquid Gated Vertically Stacked SiNW-Based 3D FET for Biosensing Applications. Sens. Actuators B 199 (2014) pp. 291-300.