Publications Repository - Helmholtz-Zentrum Dresden-Rossendorf

Using bulk silicon can be ended for 32 nm technological nodes. New type of substrates needs for further scaling in CMOS microelectronics. We speculate that these new type of materials will be semiconductor heterostructure on insulator (SHI) compatible with current silicon planar CMOS technology. Joint semiconductor material stack placed on cheap amorphous dioxide is presented. First of all thin film SiGe heterostructure properties is considered. It was obtain using Ge ion implantation in dioxide with followed Ge segregation to the directly bonded interface between silicon and silicon dioxide wafers. The method is also compatible with A3B5 thin film formation.